Sallen Key

Analog Filters

Hank Zumbahlen , with the engineering staff of Analog Devices, in Linear Circuit Design Handbook, 2008

Sallen–Key

The Sallen–Key configuration, also known as a voltage control voltage source (VCVS), was first introduced in 1955 by R.P. Sallen and E.L. Key of MIT's Lincoln Labs (see Reference 14). It is one of the most widely used filter topologies and is shown in Figure 8-49. One reason for this popularity is that this configuration shows the least dependence of filter performance on the performance of the op amp. This is due to the fact that the op amp is configured as an amplifier, as opposed to an integrator, which minimizes the gain-bandwidth requirements of the op amp. This infers that for a given op amp, you will be able to design a higher frequency filter than with other topologies since the op amp gain-bandwidth product will not limit the performance of the filter as it would if it were configured as an integrator. The signal phase through the filter is maintained (non-inverting configuration).

Figure 8-49:. Sallen–Key lowpass filter

Another advantage of this configuration is that the ratio of the largest resistor value to the smallest resistor value and the ratio of the largest capacitor value to the smallest capacitor value (component spread) are low, which is good for manufacturability. The frequency and Q terms are somewhat independent, but they are very sensitive to the gain parameter. The Sallen–Key is very Q-sensitive to element values, especially for high Q sections. The design equations for the Sallen–Key lowpass are shown in Figure 8-67.

Figure 8-67:. Sallen–Key lowpass design equations

There is a special case of the Sallen–Key lowpass filter. If the gain is set to 2, the capacitor values, as well as the resistor values, will be the same.

While the Sallen–Key filter is widely used, a serious drawback is that the filter is not easily tuned, due to interaction of the component values on F0 and Q.

To transform the lowpass into the highpass we simply exchange the capacitors and the resistors in the frequency determining network (i.e., not the amp gain resistors). This is shown in Figure 8-50. The comments regarding sensitivity of the filter given above for the lowpass case apply to the highpass case as well. The design equations for the Sallen–Key highpass are shown in Figure 8-68.

Figure 8-50:. Sallen–Key highpass filter

Figure 8-68:. Sallen–Key highpass design equations

The bandpass case of the Sallen–Key filter has a limitation (see Figure 8-51). The value of Q will determine the gain of the filter, i.e., it cannot be set independent, as in the lowpass or highpass cases. The design equations for the Sallen–Key bandpass are shown in Figure 8-69.

Figure 8-51:. Sallen–Key bandpass filter

Figure 8-69:. Sallen–Key bandpass design equations

A Sallen–Key notch filter may also be constructed, but it has a large number of undesirable characteristics. The resonant frequency, or the notch frequency, cannot be adjusted easily due to component interaction. As in the bandpass case, the section gain is fixed by the other design parameters, and there is a wide spread in component values, especially capacitors. Because of this and the availability of easier to use circuits, it is not covered here.

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Active Filter Design Techniques

Bruce Carter , Ron Mancini , in Op Amps for Everyone (Fifth Edition), 2018

16.3.2 Second-Order Low-Pass Filter

There are two topologies for a second-order low-pass filter, the Sallen–Key and the multiple feedback (MFB) topology.

16.3.2.1 Sallen–Key Topology

The general Sallen–Key topology in Fig. 16.15 allows for separate gain setting via A0  =   1   +   R4/R3. However, the unity-gain topology in Fig. 16.16 is usually applied in filter designs with high-gain accuracy, unity gain, and low Qs (Q   <   3).

Figure 16.15. General Sallen–Key low-pass filter.

Figure 16.16. Unity-gain Sallen–Key low-pass filter.

The transfer function of the circuit in Fig. 16.15 is given as:

A ( s ) = A 0 1 + ω c [ C 1 ( R 1 + R 2 ) + ( 1 A 0 ) R 1 C 2 ] s + ω c 2 R 1 R 2 C 1 C 2 s 2

For the unity-gain circuit in Fig. 16.16 (A0  =   1), the transfer function simplifies to:

A ( s ) = 1 1 + ω c C 1 ( R 1 + R 2 ) s + ω c 2 R 1 R 2 C 1 C 2 s 2

The coefficient comparison between this transfer function and Eq. (16.2) yields

A 0 = 1 a 1 = ω c C 1 ( R 1 + R 2 ) b 1 = ω c 2 R 1 R 2 C 1 C 2

Given C1 and C2, the resistor values for R1 and R2 are calculated through:

R 1,2 = a 1 C 2 a 1 2 C 2 2 4 b 1 C 1 C 2 4 π f c C 1 C 2

To obtain real values under the square root, C2 must satisfy the following condition:

C 2 C 1 4 b 1 a 1 2

Example 16.2. Second-Order Unity-Gain Tschebyscheff Low-Pass Filter.

The task is to design a second-order unity-gain Tschebyscheff low-pass filter with a corner frequency of fC  =   3   kHz and a 3-dB passband ripple.

From Table 16.11 (the Tschebyscheff coefficients for 3-dB ripple), obtain the coefficients a1 and b1 for a second-order filter with a1  =   1.0650 and b1  =   1.9305.

Specifying C1 as 22   nF yields in a C2 of:

C 2 C 1 4 b 1 a 1 2 = 22.10 9 nF · 4 · 1.9305 1.065 2 150 nF

Inserting a1 and b1 into the resistor equation for R1,2 results in:

R 1 = 1.065 · 150 · 10 9 ( 1.065 · 150 · 10 9 ) 2 4 · 1.9305 · 22 · 10 9 · 150 · 10 9 4 π · 3 · 10 3 · 22 · 10 9 · 150 · 10 9 = 1.26 k Ω

and

R 2 = 1.065 · 150 · 10 9 ( 1.065 · 150 · 10 9 ) 2 4 · 1.9305 · 22 · 10 9 · 150 · 10 9 4 π · 3 · 10 3 · 22 · 10 9 · 150 · 10 9 = 1.30 k Ω

with the final circuit shown in Fig. 16.17.

Figure 16.17. Second-order unity-gain Tschebyscheff low-pass with 3 dB ripple.

A special case of the general Sallen–Key topology is the application of equal resistor values and equal capacitor values: R1  =   R2  =   R and C1  =   C2  =   C.

The general transfer function changes to:

A ( s ) = A 0 1 + ω c RC ( 3 A 0 ) s + ( ω c RC ) 2 s 2 with A 0 = 1 + R 4 R 3

The coefficient comparison with Eq. (16.2) yields the following:

a 1 = ω RC ( 3 A 0 ) b 1 = ( ω RC ) 2

Given C and solving for R and A0 results in:

R = b 1 2 π f c C and A 0 = 3 a 1 b 1 = 3 1 Q

Thus, A0 depends solely on the pole quality Q and vice versa; Q, and with it the filter type, is determined by the gain setting of A0:

Q = 1 3 A 0

The circuit in Fig. 16.18 allows the filter type to be changed through the various resistor ratios R4/R3.

Figure 16.18. Adjustable second-order low-pass filter.

Table 16.1 lists the coefficients of a second-order filter for each filter type and gives the resistor ratios that adjust the Q.

Table 16.1. Second-Order Filter Coefficients

Second-Order Bessel Butterworth 3 dB Tschebyscheff
a1 1.3617 1.4142 1.065
b1 0.618 1 1.9305
Q 0.58 0.71 1.3
R4/R3 0.268 0.568 0.234

16.3.2.2 Multiple Feedback Low Pass Filter Topology

The multiple feedback (MFB) topology is commonly used in filters that have high Qs and require a high gain.

The transfer function of the circuit in Fig. 16.19 is given as follows:

Figure 16.19. Second-order multiple feedback low-pass filter.

A ( s ) = R 2 R 1 1 + ω c C 1 ( R 2 + R 3 + R 2 R 3 R 1 ) s + ω c 2 C 1 C 2 R 2 R 3 s 2

Through coefficient comparison with Eq. (16.2) one obtains the relation:

A 0 = R 2 R 1 a 1 = ω c C 1 ( R 2 + R 3 + R 2 R 3 R 1 ) b 1 = ω c 2 C 1 C 2 R 2 R 3

Given C1 and C2, and solving for the resistors R1–R3:

R 2 = a 1 C 2 a 1 2 C 2 2 4 b 1 C 1 C 2 ( 1 A 0 ) 4 π f c C 1 C 2 R 1 = R 2 A 0 R 3 = b 1 4 π 2 f c 2 C 1 C 2 R 2

To obtain real values for R2, C2 must satisfy the following condition:

C 2 C 1 4 b 1 ( 1 A 0 ) a 1 2

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Second order

Keng C. Wu , in Power Electronic System Design, 2021

4.7 RC filters and Sallen–Key filters

The single section RC network cited in Chapter 2 and repeated in Fig. 4.1 is a simple, first-order system. What would it be with two RC sections concatenated (Fig. 4.18)? It is surely a second-order system. Then, what is its voltage transfer function vo /vi ?

Fig 418

Fig. 4.18. Concatenated RC network.

The transfer function for a single section RC is 1/(RCs + 1). What would it be for Fig. 4.18? Would it be a product of two RC?

(4.27) H ( s ) = 1 ( R 1 C 1 s + 1 ) ( R 2 C 2 s + 1 ) ?

No, it is not that simple, as it does not account properly the loading of the second section on the first.

On expansion, Eq. (4.27) yields

(4.28) H ( s ) = 1 R 1 C 1 R 2 C 2 s 2 + ( R 1 C 1 + R 2 C 2 ) s + 1 ?

The correct transfer function is

(4.29) H ( s ) = 1 R 1 C 1 R 2 C 2 s 2 + ( R 1 C 1 + R 1 C 2 + R 2 C 2 ) s + 1

Clearly, a critical difference exists in the damping term (damping coefficient, damping ratio) of Eq. (4.28) and Eq. (4.29).

Eq. (4.2) and root locus also indicated that damping shapes system responses in a very fundamental way. Therefore, it is reasonable, and desirable, to imagine ways to alter the term in a controllable fashion. One thing comes to mind is moving and somehow reconnecting C 1 such that the damping coefficient is sized for a specific response. Fig. 4.19 shows one way for possibly doing that

Fig 419

Fig. 4.19. Modified concatenated RC network.

(4.30) H ( s ) = R 2 C 1 s + 1 R 1 C 1 R 2 C 2 s 2 + ( R 1 C 2 + R 2 C 1 + R 2 C 2 ) s + 1

It turns out that reconfiguring C 1 does not alter the damping. Instead it introduces an additional zero term. Readers should pay attention to the difference how component permutations are reshuffled and entering the damping term.

Also, on close examination, one notices that Eqs. (4.12), (4.28)–(4.30) hold subtle differences. Eq. (4.28) and (4.29) have a form c/(as 2 + bs + 1), Eq. (4.12) cs/(as 2 + bs + 1), and Eq. (4.30) (cs + 1)/(as 2 + bs + 1). It does not take any extraordinary imagination to suggest the possibility of form cs 2/(as 2 + bs + 1). As a matter of fact, forms (Eq. 4.28) and (Eq. 4.29) are low-pass filter, form (Eq. 4.12) is a band-pass filter, and form cs2/(as2 + bs + 1) is a high-pass filter. A low-pass filter attenuates high-frequency contents of an input.

A band-pass filter attenuates both low-end and high-end harmonics (Figs. 4.21 and 4.22).

So far, those types of component rearrangements seem to alter only the numerator function. None seems to offer change in the damping coefficient residing in the denominator.

An interesting, and also very important, circuit results if C 1 of Fig. 4.19 is actively bootstrapped by the output (Fig. 4.20): Sallen–Key low-pass filter (Fig 4.23). (Watch! Capacitor designation is changed.)

Fig 420

Fig. 4.20. Frequency response; Low-pass filter: R 1 = 1 K, R 2 = 10 K, C 1 = 0.01 µF, C 2 = 0.0001 µF.

Surprisingly, in the transfer function (Eq. 4.31) the unity gain Sallen–Key filter provides matches (Eq. 4.28).

(4.31) H ( s ) = 1 R 1 C 2 R 2 C 1 s 2 + ( R 1 + R 2 ) C 1 s + 1

What is the mechanism, the secret, this filter configuration uniquely possesses?

The answer lies in the generalized Sallen–Key filter (Fig. 4.24).

Circling around the active amplifier, two equations, (Eq. 4.32), are established

(4.32) v n = R 3 R 3 + R 4 v o , v o = A ( s ) ( v p v n )

Both are consolidated to yield op-amp output

(4.33) v o = A ( s ) 1 + A ( s ) R 3 R 3 + R 4 v p , approximation v o = ( 1 + R 4 R 3 ) v p

With fairly large open-loop gain A(s), the approximation is valid. Then at node vx and vp , two additional equations are also established.

(4.34) v i v x R 1 = C 2 s [ v x ( 1 + R 4 R 3 ) v p ] + v x v p R 2 v x v p R 2 = C 1 s v p

Placed in a matrix form and following Cramer's rule (matrix solution), Eq. (4.34) leads to the solution for vp .

(4.35) ( C 2 s + 1 R 1 + 1 R 2 ) v x [ C 2 ( 1 + R 4 R 3 ) + 1 R 2 ] v p = v i R 1 v x ( R 2 C 1 s + 1 ) v p = 0 v p = | C 2 s + 1 R 1 + 1 R 2 v i R 1 1 0 | | C 2 s + 1 R 1 + 1 R 2 [ C 2 ( 1 + R 4 R 3 ) + 1 R 2 ] 1 ( R 2 C 1 s + 1 ) |

Then vo/vi results

(4.36) v o v i = ( 1 + R 4 R 3 ) 1 R 1 R 2 C 1 C 2 s 2 + [ ( R 1 + R 2 ) C 1 + R 1 C 2 [ 1 ( 1 + R 4 R 3 ) ] ] s + 1

Clearly, the damping factor/coefficient embedded in the denominator can be altered in a controlled manner by adjusting the local closed-loop gain R 4 /R 3. And, if R 3 opens up, Eq. (4.36) degenerates to Eq. (4.31). Fig. 4.25 gives two examples.

Similar to Fig. 4.21, the Sallen–Key low-pass filter can be easily modified to work as a band-pass filter (Fig. 4.26).

Fig 421

Fig. 4.21. Band-pass filter R 1 = 1 K, R 2 = 10 K, C 1 = 0.0001 µF, C 2 = 0.01 µF.

Fig 422

Fig. 4.22. High-pass filter R 1 = 1 K, R 2 = 10 K, C 1 = 0.0001 µF, C 2 = 0.01 µF.

Fig 423

Fig. 4.23. Unity gain Sallen–Key low-pass filter.

Fig 424

Fig. 4.24. Generalized Sallen–Key low-pass filter.

Fig 425

Fig. 4.25. Low-pass Sallen–Key filter: R 1 = 1 K, R 2 = 10 K, C 1 = 0.0001 µF, C 2 = 0.01 µF.

Fig 426

Fig. 4.26. Band-pass Sallen–Key filter.

With patience, and following the procedure similar to Eqs. (4.34) and (4.35), the output-to-input transfer function is obtained.

(4.37) v o v i = ( 1 + R 4 R 3 ) R 2 R p 5 C 1 R 1 s R 2 R p 5 C 1 C 2 s 2 + R 2 R p 5 [ C 1 R p 2 + C 2 R 2 + C 1 R 5 [ 1 ( 1 + R 4 R 3 ) ] ] s + 1 R p 2 = ( 1 R 1 + 1 R 2 ) 1 , R p 5 = ( 1 R 1 + 1 R 5 ) 1

As a design guide, both Eqs. (4.36) and (4.37) appear to be very discouraging, as many components, more than a half dozen, are involved. But they are amendable with forms suggested in Eq. (4.2) and Eq. (4.12). For the case of designing a band-pass filter, two procedural groups, frequency and time, are called for. First, placing Eq. (4.37) in the last form of Eq. (4.12), it is then more applicable from the viewpoint of frequency-domain design specification.

(4.38) v o v i = K 2 α s s 2 + 2 α s + ω o 2 K = ( 1 + R 4 R 3 ) C 1 R 1 [ C 1 R p 2 + C 2 R 2 + C 1 R 5 [ 1 ( 1 + R 4 R 3 ) ] ] α = 1 2 [ C 1 R p 2 + C 2 R 2 + C 1 R 5 [ 1 ( 1 + R 4 R 3 ) ] ] C 1 C 2 , ω o = 1 R 2 R p 5 C 1 C 2

Eq. (4.16) gives additional aids. Still, there are more components to be sized than performance criteria concisely and compactly stated that offer clear-cut part selection measure. As a consequence, several components are chosen intuitively ahead of others, which are grounded on explicit expressions.

Example 4.6

Design a Sallen–Key band-pass filter (Fig. 4.26), with center frequency, ω o /2π, at 1 MHz; mid-band attenuation 0 db; bandwidth, 2α, 50 KHz; with preselected C 1 = C 2 = 0.001 µF, R 3 =4.99 K, R 4 =10 K. The following equation set is solved for R 1 , R 2, and R 5 using MathCAD 2000 Professional (MathSoft Inc. 101 Main St., Cambridge MA).

(4.39) 1 2 π 1 R 2 R p 5 C 1 C 2 = 10 6 [ C 1 R p 2 + C 2 R 2 + C 1 R 5 [ 1 ( 1 + R 4 R 3 ) ] ] C 1 C 2 = 50 × 10 3 20 log ( ( 1 + R 4 R 3 ) C 1 R 1 [ C 1 R p 2 + C 2 R 2 + C 1 R 5 [ 1 ( 1 + R 4 R 3 ) ] ] ) = 0

E-96, 1% parts R 1 =9.53 K, R 2 =158, R 5 =162 are chosen. The design yields Fig. 4.27.

Fig 427

Fig. 4.27. Frequency response of a band-pass Sallen–Key filter.

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Practical Problems in Filter Implementation

In Op Amp Applications Handbook, 2005

Limitations of Active Elements (Op Amps) in Filters

The active element of the filter will also have a pronounced effect on the response. In developing the various topologies (Multiple Feedback, Sallen-Key, State-Variable, and so forth), the active element was always modeled as a "perfect" operational amplifier. That is, it has:

1)

infinite gain

2)

infinite input impedance

3)

zero output impedance

none of which vary with frequency. While amplifiers have improved a great deal over the years, this model has not yet been realized.

The most important limitation of the amplifier has to do with its gain variation with frequency. All amplifiers are band limited. This is due mainly to the physical limitations of the devices with which the amplifier is constructed. Negative feedback theory tells us that the response of an amplifier must be first order (−6 dB per octave) when the gain falls to unity in order to be stable. To accomplish this, a real pole is usually introduced in the amplifier so the gain rolls off to <1 by the time the phase shift reaches 180° (plus some phase margin, hopefully). This roll-off is equivalent to that of a single-pole filter. So in simplistic terms, the transfer function of the amplifier is added to the transfer function of the filter to give a composite function. How much the frequency-dependent nature of the op amp affects the filter is dependent on which topology is used as well as the ratio of the filter frequency to the amplifier bandwidth.

The Sallen-Key configuration, for instance, is the least dependent on the frequency response of the amplifier. All that is required is for the amplifier response to be flat to just past the frequency where the attenuation of the filter is below the minimum attenuation required. This is because the amplifier is used as a gain block. Beyond cutoff, the attenuation of the filter is reduced by the roll-off of the gain of the op amp. This is because the output of the amplifier is phase-shifted, which results in incomplete nulling when fed back to the input. There is also an issue with the output impedance of the amplifier rising with frequency as the open loop gain rolls off. This causes the filter to lose attenuation.

The state-variable configuration uses the op amps in two modes, as amplifiers and as integrators. As amplifiers, the constraint on frequency response is basically the same as for the Sallen-Key, which is flat out to the minimum attenuation frequency. As an integrator, however, more is required. A good rule of thumb is that the open-loop gain of the amplifier must be greater than 10 times the closed-loop gain (including peaking from the Q of the circuit). This should be taken as the absolute minimum requirement. What this means is that there must be 20 dB loop gain, minimum. Therefore, an op amp with 10 MHz unity gain bandwidth is the minimum required to make a 1 MHz integrator. What happens is that the effective Q of the circuit increases as loop gain decreases. This phenomenon is called Q enhancement. The mechanism for Q enhancement is similar to that of slew rate limitation. Without sufficient loop gain, the op amp virtual ground is no longer at ground. In other words, the op amp is no longer behaving as an op amp. Because of this, the integrator no longer behaves like an integrator.

The multiple feedback configuration also places heavy constraints on the active element. Q enhancement is a problem in this topology as well. As the loop gain falls, the Q of the circuit increases, and the parameters of the filter change. The same rule of thumb as used for the integrator also applies to the multiple feedback topology (loop gain should be at least 20 dB). The filter gain must also be factored into this equation.

In the FDNR realization, the requirements for the op amps are not as clear. To make the circuit work, we assume that the op amps will be able to force the input terminals to be the same voltage. This implies that the loop gain be a minimum of 20 dB at the resonant frequency.

Also it is generally considered to be advantageous to have the two op amps in each leg matched. This is easily accomplished using dual op amps. It is also a good idea to have low bias current devices for the op amps so, all other things being equal, FET input op amps should be used.

In addition to the frequency-dependent limitations of the op amp, other of its parameters may be important to the filter designer.

One is input impedance. We assume in the "perfect" model that the input impedance is infinite. This is required so that the input of the op amp does not load the network around it. This means that we probably want to use FET amplifiers with high impedance circuits.

There is also a small frequency-dependent term to the input impedance, since the effective impedance is the real input impedance multiplied by the loop gain. This is not usually a major source of error, since the network impedance of a high frequency filter should be low.

Distortion resulting from Input Capacitance Modulation

Another subtle effect can be noticed with FET input amps. The input capacitance of a FET changes with the applied voltage. When the amplifier is used in the inverting configuration, such as with the multiple feedback configuration, the applied voltage is held to 0 V. Therefore there is no capacitance modulation. However, when the amplifier is used in the noninverting configuration, such as in the Sallen-Key circuit, this form of distortion can exist.

There are two ways to address this issue. The first is to keep the equivalent impedance low. The second is to balance the impedance seen by the inputs. This is accomplished by adding a network into the feedback leg of the amplifier which is equal to the equivalent input impedance. Note that this will only work for a unity gain application.

As an example, which is taken from the OP176 data sheet, a 1 kHz high-pass Sallen-Key filter is shown (Figure 5-86). Figure 5-87 shows the distortion for the uncompensated version (curve A1) as well as with the compensation (curve A2). Also shown is the same circuit with the impedances scaled up by a factor of 10 (B1 uncompensated, B2 compensated). Note that the compensation improves the distortion, but not as much as having low impedance to start with.

Figure 5-86. Compensation for input capacitance voltage modulation

Figure 5-87. Distortion due to input capacitance modulation

Similarly, the op amp output impedance affects the response of the filter. The output impedance of the amplifier is divided by the loop gain, therefore the output impedance will rise with increasing frequency. This may have an effect with high frequency filters if the output impedance of the stage driving the filter becomes a significant portion of the network impedance.

The fall of loop gain with frequency can also affect the distortion of the op amp, since there is less loop gain available for correction. In the multiple feedback configuration the feedback loop is also frequency-dependent, which may further reduce the feedback correction, resulting in increased distortion. This effect is counteracted somewhat by the reduction of distortion components in the filter network (assuming a low-pass or band-pass filter).

All of the discussion so far is based on using classical voltage feedback op amps. Current feedback, or transimpedance, op amps offer improved high frequency response, but are unusable in any topologies discussed except the Sallen-Key. The problem is that capacitance in the feedback loop of a current feedback amplifier usually causes it to become unstable. Also, most current feedback amplifiers will drive only a small capacitive load. Therefore, it is difficult to build classical integrators using current feedback amplifiers. Some current feedback op amps have an external pin that may be used to configure them as a very good integrator, but this configuration does not lend itself to classical active filter designs.

Current feedback integrators tend to be noninverting, which is not acceptable in the state variable configuration. Also, the bandwidth of a current feedback amplifier is set by its feedback resistor, which would make the Multiple Feedback topology difficult to implement. Another limitation of the current feedback amplifier in the Multiple Feedback configuration is the low input impedance of the inverting terminal. This would result in loading of the filter network. Sallen-Key filters are possible with current feedback amplifiers, since the amplifier is used as a noninverting gain block. New topologies that capitalize on the current feedback amplifiers' superior high frequency performance, and compensate for its limitations, will have to be developed.

The last thing to be aware of is exceeding the dynamic range of the amplifier. Qs over 0.707 will cause peaking in the response of the filter (see Figures 5-5 through 5-7). For high Qs, this could cause overload of the input or output stages of the amplifier with a large input. Note that relatively small values of Q can cause significant peaking. The Q times the gain of the circuit must stay under the loop gain (plus some margin; again, 20 dB is a good starting point). This holds for multiple amplifier topologies as well. Be aware of internal node levels, as well as input and output levels. As an amplifier overloads, its effective Q decreases, so the transfer function will appear to change even if the output appears undistorted. This shows up as the transfer function changing with increasing input level.

We have been dealing mostly with low-pass filters in these discussions, but the same principles are valid for high pass, band pass, and bandreject as well. In general, things like Q enhancement and limited gain/bandwidth will not affect high-pass filters, since the resonant frequency will hopefully be low in relation to the cutoff frequency of the op amp. Remember, though, that the high-pass filter will have a low pass section, by default, at the cutoff frequency of the amplifier. Band-pass and bandreject (notch) filters will be affected, especially since both tend to have high values of Q.

The general effect of the op amp's frequency response on the filter Q is shown in Figure 5-88.

Figure 5-88. Q enhancement

As an example of the Q enhancement phenomenon, consider the Spice simulation of a 10 kHz band pass Multiple Feedback filter with Q = 10 and gain = 1, using a good high frequency amplifier (the AD847) as the active device. The circuit diagram is shown in Figure 5-89. The open loop gain of the AD847 is greater than 70 dB at 10 kHz as shown in Figure 5-91(A). This is well over the 20 dB minimum, so the filter works as designed as shown in Figure 5-90.

Figure 5-89. 1 kHz multiple feedback band-pass filter

Figure 5-91. AD847 and OP-90 Bode plots

Figure 5-90. Effects of "Q enhancement"

We now replace the AD847 with an OP-90. The OP-90 is a dc precision amplifier and so has a limited bandwidth. In fact, its open loop gain is less than 10 dB at 10 kHz (see Figure 5-91(B)). This is not to imply that the AD847 is in all cases better than the OP-90. It is a case of misapplying the OP-90.

From the output for the OP-90, also shown in Figure 5-90, it can be seen that the magnitude of the output has been reduced, and the center frequency has shifted downward.

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The Laplace Transform

Steven W. Smith , in Digital Signal Processing: A Practical Guide for Engineers and Scientists, 2003

Filter Design in the s-Domain

The most powerful application of the Laplace transform is the design of systems directly in the s-domain. This involves two steps: First, the s-domain is designed by specifying the number and location of the poles and zeros. This is a pure mathematical problem, with the goal of obtaining the best frequency response. In the second step, an electronic circuit is derived that provides this s-domain representation. This is something of an art, since there are many circuit configurations that have a given pole-zero diagram.

As previously mentioned, step 4 of the Laplace transform method is very difficult if the system contains more than two poles or two zeros. A common solution is to implement multiple poles and zeros in successive stages. For example, a 6 pole filter is implemented as three successive stages, with each stage containing up to two poles and two zeros. Since each of these stages can be represented in the s-domain by a quadratic numerator divided by a quadratic denominator, this approach is called designing with biquads.

Figure 32-9 shows a common biquad circuit, the one used in the filter design method of Chapter 3. This is called the Sallen-Key circuit, after R.P. Sallen and E.L. Key, authors of a paper that described this technique in the mid-1950s. While there are several variations, the most common circuit uses two resistors of equal value, two capacitors of equal value, and an amplifier with an amplification of between 1 and 3. Although not available to Sallen and Key, the amplifiers can now be made with low-cost op amps with appropriate feedback resistors. Going through the four-step circuit analysis procedure, the location of this circuit's two poles can be related to the component values:

FIGURE 32-9. Sallen-Key characteristics. This circuit produces two poles on a circle of radius 1/RC. As the gain of the amplifier is increased, the poles move from the real axis, as in (a), toward the imaginary axis, as in (d).

EQUATION 32-4

Sallen-Key pole locations. These equations relate the pole position, ω and σ, to the amplifier gain, A, the resistor, R, and capacitor, C.

σ = A 3 2 R C ω = ± A 2 + 6 A 5 2 R C

These equations show that the two poles always lie somewhere on a circle of radius: 1/RC. The exact position along the circle depends on the gain of the amplifier. As shown in (a), an amplification of 1 places both of the poles on the real axis. The frequency response of this configuration is a low-pass filter with a relatively smooth transition between the passband and stopband. The −3dB (0.707) cutoff frequency of this circuit, denoted by ω0, is where the circle intersects the imaginary axis, i.e., ω0 = 1/RC.

As the amplification is increased, the poles move along the circle, with a corresponding change in the frequency response. As shown in (b), an amplification of 1.586 places the poles at 45 degree angles, resulting in the frequency response having a sharper transition. Increasing the amplification further moves the poles even closer to the imaginary axis, resulting in the frequency response showing a peaked curve. This condition is illustrated in (c), where the amplification is set at 2.5. The amplitude of the peak continues to grow as the amplification is increased, until a gain of 3 is reached. As shown in (d), this is a special case that places the poles directly on the imaginary axis. The corresponding frequency response now has an infinitely large value at the peak. In practical terms, this means the circuit has turned into an oscillator. Increasing the gain further pushes the poles deeper into the right half of the s-plane. As mentioned before, this correspond to the system being unstable (spontaneous oscillation).

Using the Sallen-Key circuit as a building block, a wide variety of filter types can be constructed. For example, a low-pass Butterworth filter is designed by placing a selected number of poles evenly around the left-half of the circle, as shown in Fig. 32-10. Each two poles in this configuration requires one Sallen-Key stage. As described in Chapter 3, the Butterworth filter is maximally flat; that is, it has the sharpest transition between the passband and stopband without peaking in the frequency response. The more poles used, the faster the transition. Since all the poles in the Butterworth filter lie on the same circle, all the cascaded stages use the same values for R and C. The only thing different between the stages is the amplification. Why does this circular pattern of poles provide the optimally flat response? Don't look for an obvious or intuitive answer to this question; it just falls out of the mathematics.

FIGURE 32-10. The Butterworth s-plane. The low-pass Butterworth filter is created by placing poles equally around the left-half of a circle. The more poles used in the filter, the faster the roll-off.

Figure 32-11 shows how the pole positions of the Butterworth filter can be modified to produce the Chebyshev filter. As discussed in Chapter 3, the Chebyshev filter achieves a sharper transition than the Butterworth at the expense of ripple being allowed into the passband. In the s-domain, this corresponds to the circle of poles being flattened into an ellipse. The more flattened the ellipse, the more ripple in the passband, and the sharper the transition. When formed from a cascade of Sallen-Key stages, this requires different values of resistors and capacitors in each stage.

FIGURE 32-11. Classic pole-zero patterns. These are the three classic pole-zero patterns in filter design. Butterworth filters have poles equally spaced around a circle, resulting in a maximally flat response. Chebyshev filters have poles placed on an ellipse, providing a sharper transition, but at the cost of ripple in the passband. Elliptic filters add zeros to the stopband. This results in a faster transition, but with ripple in the passband and stopband.

Figure 32-11 also shows the next level of sophistication in filter design strategy: the elliptic filter. The elliptic filter achieves the sharpest possible transition by allowing ripple in both the passband and the stopband. In the s-domain, this corresponds to placing zeros on the imaginary axis, with the first one near the cutoff frequency. Elliptic filters come in several varieties and are significantly more difficult to design than Butterworth and Chebyshev configurations. This is because the poles and zeros of the elliptic filter do not lie in a simple geometric pattern, but in a mathematical arrangement involving elliptic functions and integrals (hence the name).

Since each biquad produces two poles, even order filters (2 pole, 4 pole, 6 pole, etc.) can be constructed by cascading biquad stages. However, odd order filters (1 pole, 3 pole, 5 pole, etc.) require something that the biquad just cannot provide: a single pole on the real axis. This turns out to be nothing more than a simple RC circuit added to the cascade. For example, a 9 pole filter can be constructed from 5 stages: 4 Sallen-Key biquads, plus one stage consisting of a single capacitor and resistor.

These classic pole-zero patterns are for low-pass filters; however, they can be modified for other frequency responses. This is done by designing a low-pass filter, and then performing a mathematical transformation in the s-domain. We start by calculating the low-pass filter pole locations, and then writing the transfer function, H(s), in the form of Eq. 32-3. The transfer function of the corresponding high-pass filter is found by replacing each "s" with "1/s", and then rearranging the expression to again be in the pole-zero form of Eq. 32-3. This defines new pole and zero locations that implement the high-pass filter. More complicated s-domain transforms can create band-pass and band-reject filters from an initial low-pass design. This type of mathematical manipulation in the s-domain is the central theme of filter design, and entire books are devoted to the subject. Analog filter design is 90% mathematics and only 10% electronics.

Fortunately, the design of high-pass filters using Sallen-Key stages doesn't require this mathematical manipulation. The "1/s" for "s" replacement in the s-domain corresponds to swapping the resistors and capacitors in the circuit. In the s-plane, this swap places the poles at a new position, and adds two zeros directly at the origin. This results in the frequency response having a value of zero at DC (zero frequency), just as you would expect for a high-pass filter. This brings the Sallen-Key circuit to its full potential: the implementation of two poles and two zeros.

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Circuit collection, volume V

Richard Markell , in Analog Circuit Design, 2013

Multichannel A/D uses a single antialiasing filter

by LTC Applications Staff

The circuit in Figure 38.3 demonstrates how the LTC1594's independent analog multiplexer can simplify the design of a 12-bit data acquisition system. All four channels are MUXed into a single 1kHz, fourth-order Sallen-Key antialiasing filter, which is designed for single-supply operation. Since the LTC1594's data converter accepts inputs from ground to the positive supply, rail-to-rail op amps were chosen for the filter to maximize dynamic range. The LT1368 dual rail-to-rail op amp is compensated for the 0.1μF load capacitors (C1 and C2) that help reduce the amplifier's output impedance and improve supply rejection at high frequencies. The filter contributes less than 1LSB of error due to offsets and bias currents. The filter's noise and distortion are less than −72dB for a 100Hz, 2VP-P offset sine input.

Figure 38.3. Simple Data Acquisition System Takes Advantage of the LTC1594's MUX OUT/SHA IN Loop to Filter Analog Signals Prior to A/D Conversion

The combined MUX and A/D errors result in an integral nonlinearity error of ±3LSB (maximum) and a differential nonlinearity error of ±0.75LSB (maximum). The typical signal-to-noise plus distortion ratio is 68dB, with approximately −78dB of total harmonic distortion. The LTC1594 is programmed through a 4-wire serial interface that allows efficient data transfer to a wide variety of microprocessors and microcontrollers. Maximum serial clock speed is 200kHz, which corresponds to a 10.5kHz sampling rate.

The complete circuit consumes approximately 800μA from a single 5V supply. For ratiometric measurements, the A/D's reference can also be taken from the 5V supply. Otherwise, an external reference should be used.

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Active Filter Design Techniques

Thomas Kugelstadt , in Op Amps for Everyone (Third Edition), 2009

Publisher Summary

The simplest design of a bandpass filter is the connection of a high pass filter and a low pass filter in series, which is commonly done in wideband filter applications. Thus, a first order high pass filter and a first order low pass provide a second order bandpass, while a second order high pass filter and a second order low pass result in a fourth order bandpass response. In comparison to wideband filters, narrowband filters of higher order consist of cascaded second order bandpass filters that use the Sallen–Key or the multiple feedback topology. A filter with an even order number consists of second order stages only, while filters with an odd order number include an additional first order stage at the beginning. For low pass filter design, the higher the corner frequency of a partial filter, the higher is its Q. Therefore, to avoid the saturation of the individual stages, the filters need to be placed in the order of rising Q values. To design the first stage of a third order unity gain Bessel low pass filter, assuming the same values for fC and C1, requires a different value for R1. When operating at unity gain, the noninverting amplifier reduces to a voltage follower, thus inherently providing superior gain accuracy. High pass filters use the same two topologies as the low pass filters: Sallen–Key and multiple feedback. The only difference is that the positions of the resistors and the capacitors have changed. As with the low pass filters, higher order high pass filters are designed by cascading first order and second order filter stages. The filter coefficients are the same ones used for the low pass filter design.

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Volare

Lucio Di Jasio , in Programming 16-Bit PIC Microcontrollers in C (Second Edition), 2012

A Media Player

In the rest of this lesson though, we will focus on a much more ambitious project, putting to use all the libraries and capabilities we have acquired in the last several lessons. We will attempt to create a basic multimedia application capable of playing stereo music files off an SD™/MMC memory card.

Using a low-cost dual operational amplifier, like the MCP602, we can design a very simple Sallen Key (second order) low-pass filter for the audio band, perfectly capable of driving a small headset or to feed a more powerful stereo amplifier ( Figure 15.11).

Figure 15.11. A simple audio PWM filter circuit

The format of choice for the data will be the uncompressed WAVE format, which is compatible with almost any audio application and is the default destination format when extracting files from a music CD.

We will start by creating a brand new project ( 15-Wave ) using the New Project checklists. We will immediately add the SD/MMC low-level interface and the file I/O library for access to a FAT16 file system to the project source files list.

After opening a file for reading though, this time we will need to be able to understand the specific format used to encode the data it contains.

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Fast, Simple Filter Design

Bruce Carter , Ron Mancini , in Op Amps for Everyone (Fifth Edition), 2018

17.5.1 Low-Pass, High-Pass, and Band-Pass Filter Design Aids

This chapter has presented you with a bewildering variety of filter circuits to ponder. It is impossible (well it would be very difficult) to produce a single circuit that could implement all filter types. I will leave you instead with a single schematic of a universal filter circuit (well low pass, high pass, and band pass) (Fig. 17.22).

Figure 17.22. Universal filter schematic.

The general purpose impedances, or "Z's," can be either resistors or capacitors, depending on the filter topology selected. Not all components will be installed for every filter. Some may be 0   Ω resistors, others may be "open," not installed.

This single circuit can implement low-pass, high-pass, and band-pass stages. Although two-pole Sallen–Key filters can be implemented, why bother when you can have three poles just as easily?

As was the case for gain and offset, I have written a design aid for filters, which is also available in the companion website. Fig. 17.23 shows a screen shot.

Figure 17.23. Universal filter calculator.

A bit of explanation is in order. When the calculator first comes up, all of the impedances and units will be blank, unlike the screen shot above. To use the calculator, first you need to know whether you are designing a low-pass, high-pass, or band-pass filter. These three types are available in a drop-down menu in the "Filter Type" box. Then, there are a series of boxes that depend on the type of filter you are making: For (type of filter), Enter (value) series of lines. For example, all filter types, LP, HP, and BP require a frequency. For low and high pass, it will be the −3   dB cutoff frequency. For band pass, it will be the center frequency. So for all filters, Enter Frequency. Because this is a low-pass filter, the only remaining decisions you need to make are the capacitor sequence (E6, E12, or E24), and the seed resistor value, which will scale the capacitors. Click the "Calculate" button and the component values appear.

If you choose a high-pass filter instead, you will notice that capacitors and resistors have swapped left to right. Of course you choose a seed capacitor, instead of a seed resistor, for high-pass filters. The seven resistor values on the bottom, Ro through R2, are the same for low-pass and high-pass filters, either 0   Ω or open. These route connections to configure the universal schematic and PC board to be a three-pole Sallen–Key filter topology. This changes dramatically when you choose "band pass" instead. Z1 becomes 0   Ω, Z5 and Z6 become open, and some of the resistor values on the bottom are populated, others are used to configure the circuit for the modified Deliyannis configuration.

In addition, the schematic and circuit notes will appear to the right of the calculator. These change according to topology. It will take some experience on your part to properly scale resistors and capacitors. All capacitors should be 1% NPO/COG dielectric if at all possible, especially if the filter is to encounter different temperatures. Although higher value NPO/COG capacitors are becoming more common, 10,000   pF is generally the limit, and anything above 1000   pF is usually large, expensive, and hard to get. Resist at all costs the temptation to use 5% capacitors, especially in the band-pass filter. Choose 1% tolerance, and make that decision stick with procurement and manufacturing departments.

To further facilitate your designs, I have done a board layout of the universal filter schematic above. It is designed to accommodate SO-8 single op amps and 1206 surface-mount resistors. It is implemented a single PC board layer. The gerbers are also available from the companion website (Fig. 17.24).

Figure 17.24. Universal filter board.

You can use this approach to implement a universal arrangement on a PC board. This might be done when multiple filter stages are to be used, and it is unclear whether a given digital signal processor algorithm really needs a high-pass function, or a low-pass function, or whether the application can benefit from two stages of one type, for example.

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Real-time detection and processing of electrocardiogram signal

Dipali Bansal , in Real-Time Data Acquisition in Human Physiology, 2021

5.5.1 The acquisition protocol and results

The complete block diagram representation of a DSC based real time solution for detection and analysis of ECG Signal is depicted in Fig. 5–16. The acquisition and processing system comprises Ag–AgCl electrodes to sense the electrical activity of human heart using a three electrode set-up, the front end amplifier system with cascaded arrangement and feedback integrator, the RLD as reference, 50   Hz hardware notch filter circuit to eliminate PLI, DSC with inbuilt amplifiers, ADC and antialiasing filters for fast processing and for supporting real-time detection and MATLAB application software for display, further filtering, processing and parameterization of ECG signal.

Figure 5–16. Block diagram representation | Real-time detection of ECG signal using digital signal controller. ECG, electrocardiogram.

An intelligent and fast processing design solution is proposed for ECG detection and continuous monitoring based on Microchip's MPLAB dsPIC DSC board with part number DM-330011. Power supply to the board is managed through the USB port of a computer. Features of the dsPIC DSC board includes:

Features similar to the general purpose fixed point DSC dsPIC 33FJ 256 GP 506.

A debugger and programming circuit for on-board programming of applications.

An arrangement to input audio (analog) signals from line-in or an external microphone.

An ADC module for conversion of analog signal (ECG system output) to digital signal.

Audio/Codec Unit and Amplifiers.

An on-board module for digital filter software processing.

Compatible interfacing possibilities with PIC24 MCUs and dsPIC30F DSCs.

The DSC has 256-KB Flash and a RAM of 16-KB.

The DSC is of 16/24/32-bit with 48-kHz max-frequency.

CPU has the speed of 40 MIPS.

Operating temperature ranges −40°C to 85°C.

The operating voltage ranges from 3   V to 3.6   V.

A 6th order Sallen-Key LPF with a cut-off frequency of 3300   Hz suitable for bio-medical uses.

Digital-Communication Peripheral available: 2-UART, 2-SPI, 2-I2C.

Analog-Peripheral comprise: 1 ADC 18x12-bit at 500 kbps.

The dsPIC33F DSC board with the in-built functionality mentioned, along with the cascaded amplifier and filter system faithfully acquires the bio-signal. The proof of concept for the front end amplifier using TL-084C differential amplifier has already been verified and established. The notch filter circuit design uses 741 op-amps as has been detailed in the previous sections. For detection of ECG signal, analog signal acquired from the front-end amplifier and filter circuit is sent to the 12-bit inbuilt ADC module of the DSC kit post amplification by a noninverting Line/Microphone Amplifier and post filtering through an antialiasing filter. This is done by routing the ECG signal through the line-in socket point J7 (as shown in Fig. 5–16) for obtaining its digitized version. This eliminates the additional requirement of an ADC unit, thereby making the arrangement less cumbersome, cost-effective and compact. Filtered output from the antialiasing filter is linked to the input node AN0 of the ADC module as shown in the block diagram.

The DSC unit allows saving the acquired ECG signal through its serial Flash memory for further processing and analysis. The recording protocol includes the following steps:

The switch S1 on the board is pushed to turn off the Red LED and turn on the Yellow LED (this is done to erase the serial Flash memory).

Switch S2 is pushed to re-play and visualize the saved ECG signal. This turns on the Green LED.

The step of pushing switch S1 can be performed again to erase the prior data and to set the Flash memory ready for new recordings.

The dsPIC33F board features an application program for recording and playing back the detected information. This application program modifies the incoming signal by compressing it to 8-bits from 16-bits using the G.711 μ-law encoding algorithm. These encoded bits are then stored on the serial flash memory. The G.711 μ-law decoding algorithm is then utilized for playing back the recordings in the memory using the Audio Codec module. Taking commands from the application program, operating parameters like sampling rate, filter settings, communication protocol etc. of the Codec unit are controlled. This information is transferred through the Inter-Integrated Circuit (I2C) unit featured on board. Codec does conversion of analog ECG signal into digital signal for the Digital Converter Interface (DCI) unit and then converts it back into analog form after processing through the two-way communication DCI module. Output from the codec unit, is analog in nature which is interfaced to the output amplifier through the socket point S6 as depicted in Fig. 5–16. The amplified output is interfaced directly with the MATLAB virtual oscilloscope window through the sound port of the computer. Programs developed in MATLAB further filter the detected ECG signal and identifies RR-peak for characterizing the bio-signal. The software tool available with the DSC kit is tested and verified for the ZPBPF and peak detection algorithm developed earlier.

The DSC DM330011 based improved system developed, faithfully acquires, filters, displays, records and digitally processes real-time ECG Signal as shown in Fig. 5–17. The algorithm designed for peak detection clearly marks the RR-peak in the acquired ECG signal, which can prove to be very useful in drawing diagnostic inferences related to heart.

Figure 5–17. Results showing (A) Filtered ECG signal detected using digital signal controller and (B) Peak detected ECG signal using digital signal controller. ECG, electrocardiogram.

DSC possess inherent advantages over conventional microcontrollers in terms of the architecture used. DSC modules make use of Harvard design taking distinct memories for data and instructions while conventional MCUs use the Von-Neumann design that have a particular memory to contain both data and instructions. As information can be fetched at the same time in Harvard architecture, it provides higher speed. DSP processors make use of fixed point and floating point formats, each with certain merits and demerits. In fixed point format, numbers are represented with minimum 16-bits, are low in cost and power requirements whereas, floating point DSP processors use a minimum of 32-bits for storing data and allow faster implementation suited for custom applications. The DSP processors TS 20x manufactured by Analog Devices exhibit improved floating and fixed point operations. (Processor Comparison, pentek.com). The development tools offered by the manufacturers along with DSC kits also show a major part in planning the design of ECG monitoring units. Tool offered by Texas Instruments is the Code Composer Studio that provides an environment for fast implementation using high-level C-callable functions, and runs on Windows. Microchip's DSC boards also deliver a comprehensive user friendly IDE environment and can work on Windows. The dsPIC DSC DM 330011 board used for developing an automated acquisition system has on-board ADC and so reduces the complexity of the ECG monitor. This arrangement of integrating DSCs with the commonly used hardware/software arrangement for acquisition, processing, analysis and continuous monitoring of ECG signals in real-time helps in reducing the constraint of making a compromise between the efficiency, cost, size, power requirements, etc. The experiment established confirms refined real-time assessment of ECG signals by means of Microchip's DSC boards that needs less power, is compacted and is economical.

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